Multiple battery modules can be used to power various electronic devices. To monitor the statuses of the battery modules, multiple battery management chips can be coupled to the battery modules. A host processor can be used to communicate with the battery management chips.
FIG. 1 shows a block diagram of a conventional battery management system 100 with a host processor 120 that communicates with the battery management chips via a common bus 130. As shown in FIG. 1, the conventional battery management system 100 includes battery modules 140-1-140-3 that are coupled to battery management chips 101-103, respectively. Each of the battery modules 140-1-140-3 can include one or more battery cells. The battery management chips 101-103 can monitor the cell status of the battery modules 140-1-140-3, respectively. The battery management system 100 further includes a host processor 120 used to communicate with the battery management chips 101-103 via a common bus 130. The common bus 130 operates at the host processor 120's voltage. However, the cumulative voltage of the multiple battery modules 140-1-140-3 coupled in series can expose the common bus 130 to a high voltage potential. In order to isolate the common bus 130 from the relatively high voltage potential, multiple isolators 110-1-110-3 are used. Each of the isolators 110-1-110-3 includes multiple opto-couplers, e.g., two opto-coupler pairs as shown in FIG. 1. The isolators 110-1-110-3 are coupled between the battery management chips 101-103 and the common bus 130 to isolate the common bus 130 from the relatively high voltage potential to protect the battery management system 100. However, the opto-couplers are relatively expensive. As a result, the cost of the system is relatively high.
FIG. 2 shows a block diagram of a conventional battery management system 200 with a host processor 220 that communicates with the battery management chips. The conventional battery management system 200 includes battery modules 240-1-240-3 that are coupled to battery management chips 201-203, respectively. The battery management chips 201-203 are coupled to each other via an upward bus and a downward bus, e.g., a Serial Peripheral Interface (SPI) bus. The battery management system 200 further includes a host processor 220 coupled to the bottom battery management chip 203 via the upward bus and the downward bus. As a result, the host processor 220 can communicate with the battery management chips 201-203 via the upward bus and the downward bus. However, when a connection break occurs between adjacent battery modules, a relatively large negative voltage is generated at the break node due to the resulting quick current change in the battery management system 200, e.g., the current changes from a relatively large value to zero quickly. The relatively large negative voltage is high enough to damage the battery management chips adjacent the connection break, e.g., battery management chips 201 and 202 can be damaged when the connection break occurs between battery modules 240-1 and 240-2.
FIG. 3 shows a block diagram of a conventional battery management system 300. The conventional battery management system 300 includes battery modules 340-1 and 340-2, battery management chips 301 and 302 coupled to the battery modules 340-1 and 340-2 respectively, and a host processor 320. Battery management chip 301 is coupled to the battery management chip 302 via high-voltage diodes 331 and 332 to protect the battery management chips 301 and 302 from being damaged due to a high negative voltage caused by a connection break between battery modules 340-1 and 340-2. The diodes 331 and 332 are forward-biased in normal operation, and reverse-biased when the negative voltage is generated to protect the battery management system 300 from being damaged. Because the negative voltage is relatively high, e.g., higher than 600V in some applications, in order to protect the battery management system 300, the reverse voltages of the diodes 331 and 332 are also relatively high. However, a high-voltage diode is relatively expensive. Moreover, the high-voltage diodes respond relatively slowly. The battery management chips 301 and 302 may be damaged before the diodes 331 and 332 can respond and take protective action. In addition, a few milliamps of current are needed to ensure forward conduction, which results in high operating power consumption.